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sdramtest
- vhdl语言编写读写三星SDRAM程序,包含读写控制程序,地址转化程序,测试模块程序-vhdl language, reading and writing the Samsung SDRAM program, contains the read and write control procedures address conversion program, the test module program
Using_the_SDRAM_on_DE0_Board
- Using the SDRAM on Altera’s DE0 Board with VHDL Designs
61EDA_C915
- altera公司的SDRAM 控制器的ip core源代码 里面包含verilog及vhdl两种语言编写的 方便选择-altera company SDRAM controller ip core source code which contains verilog and vhdl two kinds of language for easy selection
SDRAM_Modelsim
- 基于VHDL的SDRAM控制器源代码以及modesim验证工程的testbench-SDRAM controller based on VHDL source code and modesim verification testbench works
ddr3
- VHDL code sample.this files is the VHDL code for using of DDR3 and DDR2 SDRAM.
ep2c8ptft
- EP2C8Q208 TFT LCD彩屏VHDL工程,含SDRAM、PLL等内容。-EP2C8Q208 TFT LCD color screen VHDL projects, including SDRAM, PLL and other content.
sdram_ctrl1
- 基于VHDL语言,实现了sdram控制器,已经过验证可用-design for sdram control
ddr_sdram
- 包含ddr_sdr_conf_pkg.vhd,reset.vhd,ddr_dcm.vhd,user_if.vhd,ddr_sdram.vhd,Mt46v16m16.vhd以及仿真TB文件;设计采用Virtex ii系列芯片,DDR_SDRAM型号为Mt46v16m16,可用于进行DDR控制的初步学习使用;通过细致了解并进行逻辑控制,可深入理解DDR芯片内部构造; 支持133MHz系统时钟频率,突发长度为2,可进行读、写、NOP、激活、自刷新配置、预充电以及各ROW/BANK的激活改变等动作,较
Datasheet_HY5PS1G431C(L)FP_HYNIX
- Datasheet_HY5PS1G431C(L)FP_HYNIX